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PD-93991D
AUTOMOTIVE MOSFET
Typical Applications
Electric Power Steering (EPS) Anti-lock Braking System (ABS) Wiper Control Climate Control Power Door
IRF1405
HEXFET(R) Power MOSFET
D
VDSS = 55V RDS(on) = 5.3m
Benefits
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
G S
ID = 169A
Specifically designed for Automotive applications, this Stripe Planar design of HEXFET(R) Power MOSFETs utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
Description
TO-220AB
Absolute Maximum Ratings
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Max.
169 118 680 330 2.2 20 560 See Fig.12a, 12b, 15, 16 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
0.45 --- 62
Units
C/W
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1
12/07/04
IRF1405
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. 55 --- --- 2.0 69 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.057 4.6 --- --- --- --- --- --- 170 44 62 13 190 130 110 4.5 7.5 5480 1210 280 5210 900 1500
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 5.3 m VGS = 10V, ID = 101A 4.0 V VDS = 10V, ID = 250A --- S VDS = 25V, ID = 110A 20 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, TJ = 150C 200 VGS = 20V nA -200 VGS = -20V 260 ID = 101A 66 nC VDS = 44V 93 VGS = 10V --- VDD = 38V --- ID = 101A ns --- RG = 1.1 --- VGS = 10V D Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact S --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 44V, = 1.0MHz --- VGS = 0V, VDS = 0V to 44V
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 169 showing the A G integral reverse --- --- 680 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 101A, VGS = 0V --- 88 130 ns TJ = 25C, IF = 101A --- 250 380 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11). Starting TJ = 25C, L = 0.11mH RG = 25, IAS = 101A. (See Figure 12). ISD 101A, di/dt 210A/s, VDD V(BR)DSS, TJ 175C Pulse width 400s; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS . Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
2
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IRF1405
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I D , Drain-to-Source Current (A)
100
10
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
4.5V
20s PULSE WIDTH TJ = 175 C
1 10 100
1 0.1
10 0.1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
TJ = 175 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
TJ = 25 C
3.0
ID = 169A
I D , Drain-to-Source Current (A)
2.5
100
2.0
1.5
10
1.0
0.5
1
V DS = 25V 20s PULSE WIDTH 4 6 8 10 12
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRF1405
100000
20
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
ID = 101A
16
VDS = 44V VDS = 27V
C, Capacitance(pF)
10000
Ciss
12
Coss
1000
8
Crss
4
100 1 10 100
0
FOR TEST CIRCUIT SEE FIGURE 13
0 60 120 180 240 300
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000
TJ = 175 C
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
100
ID, Drain-to-Source Current (A)
1000
100
TJ = 25 C
10
100sec 1msec
10 Tc = 25C Tj = 175C Single Pulse 0 1 10 10msec 100 1000
1 0.0
V GS = 0 V
0.5 1.0 1.5 2.0 2.5 3.0
1
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF1405
200
LIMITED BY PACKAGE
160
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
RD
D.U.T.
+
I D , Drain Current (A)
-VDD
120
80
Fig 10a. Switching Time Test Circuit
40
VDS 90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF1405
EAS , Single Pulse Avalanche Energy (mJ)
15V
1200
VDS
L
DRIVER
1000
ID 41A 71A BOTTOM 101A TOP
800
RG
20V
D.U.T
IAS tp
+ V - DD
A
600
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
400
200
0
25
Starting T , Junction Temperature( C) J
50
75
100
125
150
175
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS
QGD
4.0
VG
VGS(th) , Variace ( V )
3.5
Charge
3.0
ID = 250A
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
2.5
50K 12V .2F .3F
2.0
+ V - DS
D.U.T. VGS
3mA
1.5 -75 -50 -25 0 25 50 75 100 125 150 175
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRF1405
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
0.05 0.10
10
1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
600
EAR , Avalanche Energy (mJ)
500
TOP Single Pulse BOTTOM 10% Duty Cycle ID = 101A
400
300
200
100
0 25 50 75 100 125 150
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRF1405
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ ISD]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 17. For N-channel HEXFET(R) power MOSFETs
8
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IRF1405
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010 L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T HE AS S E MB L Y L INE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R
Note: "P" in assembly line position indicates "Lead-Free"
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
TO-220AB packages are not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 12/04
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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